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Almathera Ten Pack 3: CDPD 3
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run68013
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run68013.readme
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1995-03-18
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Program name: Run68013 an upgrade from Run68010
Written with: AssemPro (Profimat) assembler
Machine: Standard Amiga 500 with OS1.3, One floppy drive,1 MByte RAM
Author: Kamran Karimi
Source: Included
Run methode: From both WorkBench and Shell (As all Amiga Programs should)
What it does: Emulates 11 of the 68020 instructions with a 68000
By the way: Especial thanks to Nic Wilson for sending me SysInfo!
Program status:This program is semi-shareware meaning that I would like to
receive money, books or software if you use this program, but it is not
obligatory for poor Amiga users (I am one of them!).
I retain the CopyWrite to to the program including the source and the
executable form of it.
Directory contents:
Run68013
Run68013.s
Run68013.ReadMe
This program allows you to run programs that use the 11 of the 68020
instructions.It copies its address at the illegal instruction exception vector
and address error exception vector,then when an exception occurs it examines
the instruction to see if it is one of the instructions to be simulated and
if so simulates them with ordinary 68000 instructions.To do so it uses
self-modifying code,which is rather unpleasant especially in systems that use
caches,so do not run this program if you have a cache for only instruction
fetching ,because with a high probability it won't work correctly.This code
is ofcourse not reentrent so it disables multitasking while simulating the
instructions.
I have never worked with a real 68020 and have not seen the results of
executing the following instructions on it.My main reason to write this
program was to enable my self to work with some interesting instructions of
higher processores.
I tried to set the flag in the EXECBase structure to show that a 68010 is
present in the system but for reasons unknown to me, the program would fail.
The commands that are recognized by the program are
1) RTD #<data>
2) MOVEC Rn,CR ;MOVEC CR,Rn
3) MOVES.x Rn,<ea> ;MOVES.x <ea>,Rn
4) MOVE CCR,<ea>
5) LINK.L An,#<data>
6) CAS.x Dc,Du,<ea>
7) PACK Dn,Dm,#<data> ;PACK -(An),-(Am),#<data>
8) UNPK Dn,Dm,#<data> ;UNPK -(An),-(Am),#<data>
9) EXTB.L Dn
10) TRAPcc ;TRAPcc #<data>
11) BRA.L <label>
Rn=any general register, Dn=any data register, An=any addrress register
CR=any control register,<ea>=an effective address, #<data>=immediate data
Refer to an appropriate book for more information about these instructions
The first 10 instructions cause an illegal instruction exception.the bra.l
causes an address error exception.
After the instruction is simulated the address of the next instruction will
be put in the program counter and it will execute immediately.If you want to
single step through a program that uses this code you should put a nop after
each of the simulated instructions so that you can see the results.the nop
will be executed right after that instruction.
If none of these instructions were recognized then the program does the
following work: it pushes the address of the original illegal instruction
vector in the SSP above the previous stack frame and pushes the previous SR
after it but sets the supervisor bit and clears the trace bit,the system
always does this after an exception, now by an rte,the processor begins
executing at the proper address with the original SR and PC on the stack.as
this section do not have a self-modifying code,it can be run on any computer,
with or without cache.
Note:
none of the new 68020 addressing modes are supported.
in MOVEC instrcuction:
all the 68020 control registers are simulated by memory locations
both the MSP and ISP are interpreted as SSP.
if a value other than zero is copied in VBR, 1KByte of memory starting at
the new contents of the VBR are copied to the first KByte of memory to
ensure the use of propper vectores.
in MOVES.x instruction:
no interpretation of the contents of the DFC or SFC are made during the move
the CAS instruction:
is ofcourse not indivisible.
Ordinary 68000 instrutions are used to simulate the above mentioned
instructions.as an example the EXTB.L instruction is made of ext.w and ext.l
one after the other.only the bits that determine the operand are changed in
these two instructions according to information contained in the EXTB.L word
on the stack.
To reduce the overhead of the code almost all of the registers have been used
either as flags or to hold variables,this prevents accessing memory which is a
time consuming process.
I have not tested the program under any other OS version or processor.Maybe
someone will test it and kindly let me know about the results.I am not a good
tester and can NOT guarantee this program to be bug-free.
You can pay for the program in three ways:
1) Send a small donnation.
2) Send me computer books (especially Amiga books) ,Software or manuals you
don't need any more, or even photocopies of articles in books or magazines
containing Amiga programming guides or examples.
Here in Iran I have not much access to information on the Amiga so I would
apreciate receiving technical information in any form.
3)Send me bug reports and mention the weak points of the program and the ways
to improve it.My main reason of writing programs is to learn more.
Send any bugs you find or any suggestions or donnations to
Kamran Karimi
2,Hassanabad
Haghshenas str.
Navab str.
13599 - Tehran
Iran